1. Technical Field
The present invention relates to a semiconductor device in which a semiconductor chip thereof is packaged with resin material, and it particularly relates to the semiconductor device which is utilized in a super high-frequency band.
2. Background Art
In a semiconductor device used under a super high frequency of more than 12 GHz, a characteristic of the device is affected by inductance (L) and capacitance (C) of current lines. The current lines include a bonding wire, inner lead and outer lead which serve to connect a semiconductor chip to outer portions. In particular, a parasitic source inductance of a source of the semiconductor chip greatly affects characteristics such as noise figure (NF) and associated gain (Ga). As a result thereof, in a package of the semiconductor chip used under the high frequency, there is employed a structure in view of the above-mentioned points.
FIG. 1A and FIG. 1B show a conventional example of the package in which the semiconductor chip is shielded with ceramic. FIG. 1A is a top view thereof and FIG. 1B is a cross sectional view substantially taken along line IB--IB shown in FIG. 1A.
Referring to FIG. 1B, a single unit of field effect transistor (FET), serving as semiconductor chip 50, is mounted and sealed on a thin metal layer 51 formed, at thickness of approximately 2-3 .mu.m, on the ceramic serving as packaging material. In semiconductor chip 50 thus packaged, source, drain and gate terminals of the device 50 are respectively pulled out by metal layer 51 and connected to outer leads 52, 53, 54 of source, drain and gate, respectively.
In such a conventional structure shown in FIG. 1A, and FIG. 1B, the thickness of metal layer 51 is thinner by some .mu.m's compared to that of outer leads 52, 53, 54. As a result thereof, signal transmission loss is caused in substrate material of metal layer 51, due to a dielectric loss of ceramic such as alumina. Thereby, the noise figure (NF) and associated gain (Ga) therefor deteriorate.
Moreover, a production process in the package of the ceramic is complicated and costly, so that it is not suitable for mass production scheme.
FIG. 2A and FIG. 2B show a conventional example of the package in which the semiconductor chip used under the high-frequency band is shielded with resin. FIG. 2A is a top view thereof and FIG. 2B is a cross sectional view substantially taken along line IIB--IIB shown in FIG. 2A.
Referring to FIG. 2A and FIG. 2B, inner lead 57 on which semiconductor chip 56 shielded with resin package material 55 is mounted, requires that thickness of resin located under inner lead 57 be more than a predetermined value such as greater than 0.33 mm. Thereby, a vertical distance is undesirably great between a surface of inner lead 57 (that is, for example, a source terminal surface connected to a ground potential) and ground potential surface 59 to which outer lead 58 and the ground potential are connected. Such a vertical distance is illustrated as VERTICAL DISTANCE in FIG. 2B. As a result, an inductance for inner lead 57 becomes undesirably great-valued.
Moreover, the distance between a connecting portion of outer lead 58 and the ground potential, and the source terminal of semiconductor chip 56 is rather long and is not sufficiently close enough. Circumference of inner lead 57 is enclosed by resin having greater dielectric loss than that of alumina. As a result thereof, inductance therefor is significantly larger than that for ceramic package. Therefore, the noise figure as well as associated gain therefor is greatly deteriorated. When .delta. represents dielectric loss angle, tan .delta.=0 for air, whereas tan .delta.=0.016 for resin.
On the other hand, in order that the thickness of the resin disposed below inner lead 57 is made thin and the inductance therefor is reduced, the resin thickness needs to be set at 0.1 mm or lower. Then, it is very difficult for the structure shown in FIG. 2A and FIG. 2B inner lead 57 to keep its configuration as such. The manufacture therefor is also difficult to achieve.
Furthermore, referring to FIG. 1B, in the conventional scheme, there are caused problems where a cap need be bonded so as to cause complication in processing thereof and to cause to necessitate an inspection process such as a shielding test.
Accordingly, the inductance for the inner leads connecting the chip and the outer portions becomes undesirably large in the conventional package made of ceramic or resin that stores the semiconductor chip under use of the high frequency band. As a result, there is caused a problem where the high-frequency characteristic in the noise figure and associated gain is deteriorated.